The present invention relates, in general, to electronics, and more particularly, to methods of forming semiconductor devices and structure.
In the past, the electronics industry utilized various methods and techniques to form voltage detection circuits. Such voltage detection circuits were used to determine when an input voltage reached a particular desired operating voltage value. One particular usage for such voltage detection circuits was in power supply applications where it was important to detect that the incoming voltage reached a particular value before turning on the power supply regulators and other circuitry. Typically such voltage detection circuits utilized a resistive voltage divider to form a voltage reference value. A differential comparator circuit compared the reference value to the value of the incoming voltage in order to determine if the incoming voltage had reached the reference value.
One particular problem with these voltage detection circuits was power dissipation. The resistor divider typically dissipated substantial amounts of power. Additionally, the comparator also consumed power. Such prior voltage detection circuits typically consumed at least three hundred to five hundred micro amps of current. Additionally, the voltage divider consumed large amounts of area on a semiconductor die. In order to lower the power dissipation, large value resistors were utilized in the voltage divider. Such large value resistors further consumed semiconductor area, thereby increasing the cost of the voltage detection circuits.
Accordingly, it is desirable to have a method of forming a voltage detection circuit that reduces power dissipation and current consumption, that reduces semiconductor die area usage, and that reduces costs.